Indigenous memory technology moves from lab to fab

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Indigenous memory technology moves from lab to fab


IIT Bombay researchers have developed a “memory technology” that may, in precept, revolutionise Indian trade and the various functions that want semiconductor chips, similar to within the defence sector, vehicles and future aspirations in cellphone manufacturing. Hard disks, flash memory, and so on, are examples of memory technology. There can also be one other type of memory referred to as the one-time programmable memory (OTP) the place the memory is written as soon as, saved for a lifetime, and retrieved and used many occasions. This finds different makes use of, certainly one of which is in correcting defective chips which were mass produced for particular functions.

Correcting offsets

For occasion, consider a chip that helps learn off the temperature. Due to a producing defect, the chip could learn 100 diploma Celsius as 101 diploma Celsius. This “offset” of 1 diploma could also be corrected by storing the error correction parameter within the OTP memory. This is finished uniquely for every chip and as soon as saved, the memory corrects the chip’s output for its lifetime.

“OTP memories are also used for other purposes, mainly three: chip identity, secure information storage and chip calibration for error correction,” says Udayan Ganguly, professor at IIT Bombay, who holds the patents for the invention together with A. Lele, S. Sadana and P. Kumbhare.

Storing values

To retailer the correction worth, the researchers used eight memory cells, every of which might retailer one “bit” (that could be a worth of zero or one). Each of the memory cells encompass an ultrathin silicon dioxide layer which is 10-15 atomic layers thick. This is deposited uniformly over a dinner plate–sized eight-inch silicon wafer to type thousands and thousands of nanoscale capacitors. “The pristine silicon dioxide layer is insulating, passing a very low current [which in digital electronics is read as a “0”]. A nanoscale lightning is generated of three.3 volts to blow the capacitor, main to a brief circuit that produced excessive present [this is a “1”],” says Prof. Ganguly. Thus, the OTP memory remembers both the “0” state or “1” state by its lifetime.

The group, in collaboration with the Semi-Conductor Laboratory, Mohali, Punjab (SCL), has efficiently demonstrated CMOS 180-nanometre–based mostly, production-ready, eight-bit memory technology, in accordance to a press launch from the workplace of the Principal Scientific Adviser to Government of India. Reiterating this, Prof Ganguly says, “We have shown that the memory cells and arrays pass all the specifications for the trimming application when manufactured in the SCL 180-nanometre CMOS line. These include successful operation between minus 40 degrees C to 125 degrees C and reliability to ensure excess of 95% yield on eight-bit memories.”

According to him, a big fraction of manufactured chips might have to be discarded for faults that may be corrected utilizing this technology. This technology is the primary indigenous semiconductor memory technology adoption to manufacturing at 180-nanometre node. Thus, it is a main nationwide milestone for semiconductor innovation, says Prof Ganguly.

Better course of

There exist different strategies of reaching OTP recollections than described above. However, these demand difficult engineering methods and likewise require excessive voltage, which comes with a big space penalty.

“In contrast, we use a dedicated insulator material which is specially engineered silicon dioxide at 2.5-nanometre thickness to breakdown at 3.3 volt without any special structures along with a standard transistor. Thus, the transistor is not disturbed, and no special high voltage generation is needed,” says Prof. Ganguly, mentioning the enticing options of the technology.

First buyer

Semi-Conductor Lab (SCL), Punjab, is the primary buyer to attempt to use this technology for inner functions. Apart from collaborating with SCL, the workforce at IIT Bombay partnered with IIT Delhi, SETS Chennai and Defence Research and Development Organization for {hardware} encryption.

“The concept came out of a PhD Thesis in IIT Bombay… This is the first indigenous 180-nanometre memory technology to have successfully graduated from lab to fab in 2021. It has taken six years in the process of translating research to manufacturing,” says Prof. Ganguly.



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